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? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565rs/rq ? green-mode farichild power switch (fps?) for quasi-resonant operation fsq0565rs/rq rev. 1.0.2 april 2009 fsq0565rs/rq green-mode fairchild power switch (fps?) for quasi-resonant operation - low emi and high efficiency features ! optimized for quasi-resonant converters (qrc) ! low emi through variable frequency control and avs (alternating valley switching) ! high-efficiency through minimum voltage switching ! narrow frequency variation range over wide load and input voltage variation ! advanced burst-mode operation for low standby power consumption ! simple scheme for sync voltage detection ! pulse-by-pulse current limit ! various protection functi ons: overload protection (olp), over-voltage prot ection (ovp), internal thermal shutdown (tsd) with hysteresis, output short protection (osp) ! under-voltage lockout (uvlo) with hysteresis ! internal startup circuit ! internal high-voltage sense fet (650v) ! built-in soft-start (17.5ms) applications ! power supply for lcd tv and monitor, vcr, svr, stb, and dvd & dvd recorder ! adapter related resources visit: http://www.fairchildsemi.com/apnotes/ for: ! an-4134: design guidelines for offline forward converters using fairchild power switch (fps ? ) ! an-4137: design guidelines for offline flyback converters using fairchild power switch (fps ? ) ! an-4140: transformer design consideration for offline flyback converters using fairchild power switch (fps ? ) ! an-4141: troubleshooting and design tips for fairchild power switch (fps ? ) flyback applications ! an-4145: electromagnetic compatibility for power converters ! an-4147: design guidelines for rcd snubber of flyback converters ! an-4148: audible noise reduction techniques for fairchild power switch (fps ?) applications ! an-4150: design guidelines for flyback converters using fsq-series fairchild power switch (fps ? ) description a quasi-resonant converter (qrc) generally shows lower emi and higher power conversion efficiency than a conventional hard-switched converter with a fixed switching frequency. the fsq-series is an integrated pulse-width modulation (pwm) controller and sensefet specifically designed for quasi-resonant operation and alternating valley switching (avs). the pwm controller includes an integrated fixed-frequency oscillator, under-voltage lockout (uvlo), leading- edge blanking (leb), optimized gate driver, internal soft- start, temperature-compensated precise current sources for a loop compensation, and self-protection circuitry. compared with a discrete mosfet and pwm controller solution, the fsq-series can reduce total cost, component count, size, and weight; while simultaneously increasing efficiency, productivity, and system reliability. this device provides a basic platform for cost-effective designs of quasi-resonant switching flyback converters.
fsq0565rs/rq ? green-mode farichild power switch (fps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565rs/rq rev. 1.0.2 2 ordering information notes: 1. the junction temperature can limit the maximum output power. 2. 230v ac or 100/115v ac with doubler. 3. typical continuous power in a non-ventilated enc losed adapter measured at 50c ambient temperature. 4. maximum practical continuous power in an open-frame design at 50c ambient. 5. for fairchild?s definition of ?g reen? eco status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html . application diagram figure 1. typical flyback application product number eco status operating temp. current limit r ds(on) max. maximum output power (1) replaces devices 230v ac 15% (2) 85-265v ac adapter (3) open frame (4) adapter (3) open frame (4) fsq0565rswdtu rohs -25 to +85c 2.25a 2.2 70w 80w 41w 60w fscm0565r fsdm0565re FSQ0565RQWDTU 3.0a v cc gnd drain sync v o pwm v fb ac in v str fsq0565rs rev. 00
fsq0565rs/rq ? green-mode farichild power switch (fps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565rs/rq rev. 1.0.2 3 block diagrams figure 2. internal block diagram of fsq0565rs figure 3. internal block diagram of fsq0565rq 8v/12v v ref s q r v cc v ref i delay i fb v sd v ovp v ocp s q q r r 3r v cc good v cc drain fb gnd aocp gate driver v cc good leb 250ns pwm v burst 5 sync (1.1v) soft- start 0.35/0.55 osc v str tsd 4 3 1 6 fsq0565rs rev.00 2 avs q v osp lpf lpf t on < t osp after ss v cc 8v/12v v ref s q r v cc v ref i delay i fb v sd v ovp v ocp s q q r r 3r v cc good v cc drain fb gnd aocp gate driver v cc good leb 250ns pwm v burst 5 sync (1.1v) soft- start 0.35/0.55 osc v str tsd 4 3 1 6 fsq0565rq rev.00 2 avs q v osp lpf lpf t on < t osp after ss
fsq0565rs/rq ? green-mode farichild power switch (fps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565rs/rq rev. 1.0.2 4 pin configuration figure 4. pin configuration (top view) pin definitions pin # name description 1drain sensefet drain. high-voltage power sensefet drain connection. 2gnd ground. this pin is the control ground and the sensefet source. 3v cc power supply. this pin is the positive supply input, providing internal operating current for both startup and steady-state operation. 4fb feedback. this pin is internally connected to the inverting input of the pwm comparator. the collector of an opto-coupler is typically tied to this pin. for stable operation, a capacitor should be placed between this pin and gnd. if the vo ltage of this pin reaches 6v, the overload protection triggers, which shuts down the fps. 5 sync sync. this pin is internally connected to the sync-detect comparator for quasi-resonant switch- ing. in normal quasi-resonant operation, the threshold of the sync comparator is 1.2v/1.0v. 6v str startup. this pin is connected directly, or through a resistor, to the high-voltage dc link. at startup, the internal high-volt age current source supplies internal bias and charges the exter- nal capacitor connected to the v cc pin. once v cc reaches 12v, the internal current source is disabled. it is not recommended to connect v str and drain together. 6. v str 5. sync 4. fb 3. v cc 2. gnd 1. drain fsq0565 rev.00
fsq0565rs/rq ? green-mode farichild power switch (fps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565rs/rq rev. 1.0.2 5 absolute maximum ratings stresses exceeding the absolute maximum ratings may damage the device. the device may not function or be opera- ble above the recommended operating conditions and stressing the parts to these levels is not recommended. in addi- tion, extended exposure to stresses above the recommended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. t a = 25c, unless otherwise specified. notes: 6. repetitive rating: pulse-width limi ted by maximum junction temperature. 7. l=14mh, starting t j =25c. thermal impedance t a = 25c unless otherwise specified. notes: 8. free standing with no heat-sin k under natural convection. 9. infinite cooling condition - refer to the semi g30-88. symbol parameter min. max. unit v str v str pin voltage 500 v v ds drain pin voltage 650 v v cc supply voltage 20 v v fb feedback voltage range -0.3 13.0 v v sync sync pin voltage -0.3 13.0 v i dm drain current pulsed 11 a i d continuous drain current (6) t c = 25c 2.8 a t c = 100c 1.7 e as single pulsed avalanche energy (7) 190 mj p d total power dissipation (t c =25c) 45 w t j operating junction temperat ure internally limited c t a operating ambient temperature -25 +85 c t stg storage temperature -55 +150 c esd electrostatic discharge capab ility, human body model 2.0 kv electrostatic discharge capability, charged device model 2.0 symbol parameter package value unit ja junction-to-ambient thermal resistance (8) to-220f-6l 50 c/w jc junction-to-case thermal resistance (9) 2.8 c/w
fsq0565rs/rq ? green-mode farichild power switch (fps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565rs/rq rev. 1.0.2 6 electrical characteristics t a = 25 c unless otherwise specified. continued on the following page... symbol parameter condition min. typ. max. unit sensefet section bv dss drain source breakdown voltage v cc = 0v, i d = 100a 650 v i dss zero-gate-voltage drain current v ds = 560v 300 a r ds(on) drain-source on-state resistance t j = 25c, i d = 0.5a 1.76 2.20 c oss output capacitance v gs = 0v, v ds = 25v, f = 1mhz 78 pf t d(on) turn-on delay time v dd = 350v, i d = 25ma 22 ns t r rise time v dd = 350v, i d = 25ma 52 ns t d(off) turn-off delay time v dd = 350v, i d = 25ma 95 ns t f fall time v dd = 350v, i d = 25ma 50 ns control section t on.max maximum on time t j = 25c 8.8 10.0 11.2 s t b blanking time t j = 25c, v sync = 5v 13.5 15.0 16.5 s t w detection time window t j = 25c, v sync = 0v 6.0 s f s initial switching frequency 59.6 66.7 75.8 khz f s switching frequency variation (11) -25c < t j < 85c 5 10 % t avs avs triggering threshold (11) on time at v in = 240v dc , lm = 360 h (avs triggered when v avs > spec. and t avs < spec.) 4.0 s v avs feedback voltage 1.2 v t sw switching time variance by avs (11) sync = 500khz sine input v fb = 1.2v, t on = 4.0s 13.5 20.5 s i fb feedback source current v fb = 0v 700 900 1100 a d min minimum duty cycle v fb = 0v 0 % v start uvlo threshold voltage 11 12 13 v v stop after turn-on 7 8 9 v t s/s internal soft-start time with free-running frequency 17.5 ms v ovp over-voltage protection (fsq0565rs) 18 19 20 v v ovp over-voltage protection (fsq0565rq) threshold voltage v cc = 15v, v fb = 2v 7.4 8 9.6 v t ovp blanking time (11) 1.0 1.7 2.4 s burst-mode section v burh burst-mode voltages t j = 25c, t pd = 200ns (10) 0.45 0.55 0.65 v v burl 0.25 0.35 0.45 v hysteresis 200 mv
fsq0565rs/rq ? green-mode farichild power switch (fps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565rs/rq rev. 1.0.2 7 electrical characteristics (continued) t a = 25 c unless otherwise specified. notes: 10. propagation delay in the control ic. 11. guaranteed by design; not tested in production. 12. includes gate turn-on time. symbol parameter condition min. typ. max. unit protection section i limit peak current limit fsq0565rs t j = 25c, di/dt = 370ma/s 2.00 2.25 2.50 a i limit fsq0565rq t j = 25c, di/dt = 370ma/s 2.64 3.0 3.36 a v sd shutdown feedback voltage v cc = 15v 5.5 6.0 6.5 v i delay shutdown delay current v fb = 5v 4 5 6 a t leb leading-edge blanking time (11) 250 ns t osp output short protection (11) threshold time t j = 25c osp triggered when t on < t osp , v fb > v osp and lasts longer than t osp_fb 1.2 1.4 s v osp threshold feedback voltage 1.8 2.0 v t osp_fb feedback blanking time 2.0 2.5 3.0 s t sd thermal shutdown (11) shutdown temperature 125 140 155 c hys hysteresis 60 sync section v sh1 sync threshold voltage 1 v cc = 15v, v fb = 2v 1.0 1.2 1.4 v v sl1 0.8 1.0 1.2 t sync sync delay time (11, 12) 230 ns v sh2 sync threshold voltage 2 v cc = 15v, v fb = 2v 4.3 4.7 5.1 v v sl2 4.0 4.4 4.8 v clamp low clamp voltage i sync_max = 800a, i sync_min = 50a 0.0 0.4 0.8 v total device section i op operating supply current v cc = 13v 1 3 5 ma i start start current v cc = 10v (before v cc reaches v start ) 350 450 550 a i ch startup charging current v cc = 0v, v str = minimum 50v 0.65 0.85 1.00 ma v str minimum v str supply voltage 26 v
fsq0565rs/rq ? green-mode farichild power switch (fps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565rs/rq rev. 1.0.2 8 comparison between fsdm0x65rnb and fsq-series differences between fs q0565rs and fsq0565rq function fsdm0x65re fsq-series fsq-series advantages operation method constant frequency pwm quasi-resonant operation ! improved efficiency by valley switching ! reduced emi noise ! reduced components to detect valley point emi reduction frequency modulation reduced emi noise ! valley switching ! inherent frequency modulation ! alternate valley switching hybrid control ccm or avs based on load and input condition ! improves efficiency by introducing hybrid control burst-mode operation burst-mode operation advanced burst-mode operation ! improved standby power by advanced burst-mode strong protections olp, ovp olp, ovp, osp ! improved reliability through precise osp tsd 145c without hysteresis 140c with 60c hysteresis ! stable and reliable tsd operation ! converter temperature range function fsq0565rs fsq0565rq remark i lim 2.25a 3.0a ! lower current peak is suitable to reduce conduc- tion loss ! higher current peak is suitable for handling higher power over voltage protection v cc ovp (triggered by v cc voltage) sync ovp (triggered by sync voltage) ! sync ovp is suitable when v cc voltage is pre reg- ulated.
fsq0565rs/rq ? green-mode farichild power switch (fps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565rs/rq rev. 1.0.2 9 typical performance characteristics these characteristic graphs are normalized at t a = 25c. figure 5. operating supply current (i op ) vs. t a figure 6. uvlo start threshold voltage (v start ) vs. t a figure 7. uvlo stop threshold voltage (v stop ) vs. t a figure 8. startup charging current (i ch ) vs. t a figure 9. initial switching frequency (f s ) vs. t a figure 10. maximum on time (t on.max ) vs. t a -25 0 25 50 75 100 125 0.0 0.2 0.4 0.6 0.8 1.0 1.2 normalized temperature [c] -25 0 25 50 75 100 125 0.0 0.2 0.4 0.6 0.8 1.0 1.2 normalized temperature [c] -25 0 25 50 75 100 125 0.0 0.2 0.4 0.6 0.8 1.0 1.2 normalized temperature [c] -25 0 25 50 75 100 125 0.0 0.2 0.4 0.6 0.8 1.0 1.2 normalized temperature [c] -25 0 25 50 75 100 125 0.0 0.2 0.4 0.6 0.8 1.0 1.2 normalized temperature [c] -25 0 25 50 75 100 125 0.0 0.2 0.4 0.6 0.8 1.0 1.2 normalized temperature [c]
fsq0565rs/rq ? green- mode farichild power switch (f ps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565rs/rq rev. 1.0.2 10 typical performance characteristics (continued) these characteristic graphs are normalized at t a = 25c. figure 11. blanking time (t b ) vs. t a figure 12. feedback source current (i fb ) vs. t a figure 13. shutdown delay current (i delay ) vs. t a figure 14. burst-mode high threshold voltage (v burh ) vs. t a figure 15. burst-mode low threshold voltage (v burl ) vs. t a figure 16. peak current limit (i lim ) vs. t a -25 0 25 50 75 100 125 0.0 0.2 0.4 0.6 0.8 1.0 1.2 normalized temperature [c] -25 0 25 50 75 100 125 0.0 0.2 0.4 0.6 0.8 1.0 1.2 normalized temperature [c] -25 0 25 50 75 100 125 0.0 0.2 0.4 0.6 0.8 1.0 1.2 normalized temperature [c] -25 0 25 50 75 100 125 0.0 0.2 0.4 0.6 0.8 1.0 1.2 normalized temperature [c] -25 0 25 50 75 100 125 0.0 0.2 0.4 0.6 0.8 1.0 1.2 normalized temperature [c] -25 0 25 50 75 100 125 0.0 0.2 0.4 0.6 0.8 1.0 1.2 normalized temperature [c]
fsq0565rs/rq ? green- mode farichild power switch (f ps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565rs/rq rev. 1.0.2 11 typical performance characteristics (continued) these characteristic graphs are normalized at t a = 25c. figure 17. sync high threshold voltage 1 (v sh1 ) vs. t a figure 18. sync low threshold voltage 1 (v sl1 ) vs. t a figure 19. shutdown feedback voltage (v sd ) vs. t a figure 20. over-voltage protection (v ov ) vs. t a figure 21. sync high threshold voltage 2 (v sh2 ) vs. t a figure 22. sync low threshold voltage 2 (v sl2 ) vs. t a -25 0 25 50 75 100 125 0.0 0.2 0.4 0.6 0.8 1.0 1.2 normalized temperature [c] -25 0 25 50 75 100 125 0.0 0.2 0.4 0.6 0.8 1.0 1.2 normalized temperature [c] -25 0 25 50 75 100 125 0.0 0.2 0.4 0.6 0.8 1.0 1.2 normalized temperature [c] -25 0 25 50 75 100 125 0.0 0.2 0.4 0.6 0.8 1.0 1.2 normalized temperature [c] -25 0 25 50 75 100 125 0.0 0.2 0.4 0.6 0.8 1.0 1.2 normalized temperature [c] -25 0 25 50 75 100 125 0.0 0.2 0.4 0.6 0.8 1.0 1.2 normalized temperature [c]
fsq0565rs/rq ? green- mode farichild power switch (f ps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565rs/rq rev. 1.0.2 12 functional description 1. startup: at startup, an internal high-voltage current source supplies the internal bias and charges the external capacitor (c a ) connected to the v cc pin, as illustrated in figure 23. when v cc reaches 12v, the fps? begins switching and the internal high-voltage current source is disabled. the fps? continues its normal switching operation and the power is supplied from the auxiliary transformer winding unless v cc goes below the stop voltage of 8v. figure 23. startup circuit 2. feedback control: fps employs current-mode control, as shown in figure 24. an opto-coupler (such as the fod817a) and shunt regulator (such as the ka431) are typically used to impl ement the feedback network. comparing the feedback voltage with the voltage across the r sense resistor makes it po ssible to control the switching duty cycle. when the reference pin voltage of the shunt regulator exceeds the internal reference voltage of 2.5v, the opto-coupler led current increases, pulling down the feedback voltage and reducing the duty cycle. this typically happens when the input voltage is increased or the output load is decreased. figure 24. pulse-width-mo dulation (pwm) circuit 2.1 pulse-by-pulse current limit: because current- mode control is employed, the peak current through the sensefet is limited by the inverting input of pwm comparator (v fb *), as shown in figure 24. assuming that the 0.9ma current sour ce flows only through the internal resistor (3r + r = 2.8k), the cathode voltage of diode d2 is about 2.5v. since d1 is blocked when the feedback voltage (v fb ) exceeds 2.5v, the maximum voltage of the cathode of d2 is clamped at this voltage, clamping v fb *. therefore, the peak value of the current through the sensefet is limited. 2.2 leading-edge blanking (leb): at the instant the internal sensefet is turned on, a high-current spike usually occurs through the sensefet, caused by primary-side capacitance a nd secondary-side rectifier reverse recovery. excessi ve voltage across the r sense resistor would lead to incorrect feedback operation in the current-mode pwm control. to counter this effect, the fps employs a leading-edge blanking (leb) circuit. this circuit inhibits the pwm comparator for a short time (t leb ) after the sensefet is turned on. 3. synchronization: the fsq-series employs a quasi- resonant switching technique to minimize the switching noise and loss. the basic waveforms of the quasi- resonant converter are shown in figure 25. to minimize the mosfet's switching lo ss, the mosfet should be turned on when the drain voltage reaches its minimum value, which is indirectly detected by monitoring the v cc winding voltage, as shown in figure 25. figure 25. quasi-resonant switching waveforms 8v/12v 3 v ref internal bias v cc 6 v str i start v cc good v dc c vcc fsq0565 rev.00 4 osc v cc v ref i delay i fb v sd r 3r gate driver olp d1 d2 + v fb * - v fb ka431 c b v o h11a817a r sense sensefet fsq0565 rev.00 v dc v ro v ro v ds t f 1.2v v sync 230ns delay 1.0v on on v ovp (8v) mosfet gate fsq0565 rev.00
fsq0565rs/rq ? green- mode farichild power switch (f ps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565rs/rq rev. 1.0.2 13 the switching frequency is the combination of blank time (t b ) and detection time window (t w ). in case of a heavy load, the sync voltage remains flat after t b and waits for valley detection during t w . this leads to a low switching frequency not suitable for heavy loads. to correct this drawback, additional timing is used. the timing conditions are described in figures 26, 27, and 28. when the v sync remains flat higher than 4.4v at the end of t b , which is instant t x , the next switching cycle starts after internal delay time from t x . in the second case, the next switching occurs on the valley when the v sync goes below 4.4v within t b . once v sync detects the first valley in t b , the other switching cycle follows classical qrc operation. figure 26. v sync > 4.4v at t x figure 27. v sync < 4.4v at t x figure 28. after v sync finds first valley 4. protection circuits: the fsq-series has several self-protective func tions, such as overload protection (olp), over-voltage protection (ovp), and thermal shutdown (tsd). all the protections are implemented as auto-restart mode. once the fault condition is detected, switching is terminated and the sensefet remains off. this causes v cc to fall. when v cc falls down to the under-voltage lockout (uvlo) stop voltage of 8v, the protection is reset and the startup circuit charges the v cc capacitor. when the v cc reaches the start voltage of 12v, normal operation resumes. if the fault condition is not removed, the sensefet remains off and v cc drops to stop voltage again. in this manner, the auto-restart can alternately enable and disable the switching of the power sensefet until the fault condition is eliminated. because these protection circui ts are fully integrated into the ic without external components, reliability is improved without increasing cost. figure 29. auto restart protection waveforms t b =15s i ds v ds v sync internal delay i ds 4.4v 1.2v 1.0v t x fsq0565 rev.00 t b =15us i ds v ds v sync internal delay i ds 4.4v 1.2v 1.0v t x fsq0565 rev.00 t b =15us i ds i ds v ds v sync internal delay 4.4v 1.2v 1.0v ingnore t x fsq0565 rev.00 fault situation 8v 12v v cc v ds t fault occurs fault removed normal operation normal operation power on fsq0565 rev.00
fsq0565rs/rq ? green- mode farichild power switch (f ps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565rs/rq rev. 1.0.2 14 4.1 overload protection (olp): overload is defined as the load current exceeding its normal level due to an unexpected abnormal event. in this situation, the protection circuit should trigger to protect the smps. however, even when the smps is in the normal operation, the overload protection circuit can be triggered during the load transition. to avoid this undesired operation, the over load protection circuit is designed to trigger only after a specified time to determine whether it is a tr ansient situation or a true overload situation. becaus e of the pulse-by-pulse current limit capability, the maximum peak current through the sensefet is limited, and therefore the maximum input power is restricted with a given input voltage. if the output consum es more than this maximum power, the output voltage (v o ) decreases below the set voltage. this reduces the current through the opto- coupler led, which also reduces the opto-coupler transistor current, thus increasing the feedback voltage (v fb ). if v fb exceeds 2.5v, d1 is blocked and the 5a current source starts to charge c b slowly up to v cc . in this condition, v fb continues increasing until it reaches 6v, when the switching operation is terminated, as shown in figure 30. the delay time for shutdown is the time required to charge c fb from 2.5v to 6v with 5a. a 20 ~ 50ms delay time is typical for most applications. figure 30. overload protection 4.2 abnormal over-current protection (aocp): when the secondary rectifier diodes or the transformer pins are shorted, a steep current wit h extremely high di/dt can flow through the sensefet during the leb time. even though the fsq-series has ov erload protection, it is not enough to protect the fsq-series in that abnormal case, since severe current stress is imposed on the sensefet until olp triggers. the fsq-series has an internal aocp circuit, shown in figure 31. when the gate turn- on signal is applied to the power sensefet, the aocp block is enabled and monitors the current through the sensing resistor. the voltage across the resistor is compared with a preset aocp level. if the sensing resistor voltage is greater than the aocp level, the set signal is applied to the latch, resulting in the shutdown of the smps. figure 31. abnormal over-current protection 4.3 output-short protection (osp): if the output is shorted, steep current with ex tremely high di/dt can flow through the sensefet during the leb time. such a steep current brings high voltage stress on the drain of sensefet when turned off. to protect the device from such an abnormal condition, osp is included in the fsq- series. it is comprised of detecting v fb and sensefet turn-on time. when the v fb is higher than 2v and the sensefet turn-on time is lower than 1.2s, the fps recognizes this condition as an abnormal error and shuts down pwm switching until v cc reaches v start again. an abnormal condition output shor t is shown in figure 32. figure 32. output short waveforms 4.4.1 v cc over-voltage protection (ovp) of fsq0565rs: if the secondary-side feedback circuit malfunctions or a solder defect causes an opening in the feedback path, the current through the opto-coupler transistor becomes almost zero. in this case, v fb climbs up in a similar manner to t he overload situation, forcing the preset maximum current to be supplied to the smps until overload protection is activated. because more energy than required is prov ided to the output, the output voltage may exceed the rated voltage before overload protection is activated, resu lting in the breakdown of the devices in the secondary side. to prevent this situation, an over-voltage protection (ovp) circuit is employed. in general, v cc is proportional to the output voltage and the v fb t 2.5v 6.0v overload protection t 12 = c fb *(6.0-2.5)/i delay t 1 t 2 fsq0565 rev.00 2 s q q r osc r 3r gnd gate driver leb 250ns pwm + - v ocp aocp r sense fsq0765r rev.00 d mosfet drain current rectifier diode current v fb v o 0 0 output short occurs 1.2s i o 0 i lim turn-off delay minimum turn-on time fsq0565 rev. 00
fsq0565rs/rq ? green- mode farichild power switch (f ps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565rs/rq rev. 1.0.2 15 fsq-series uses v cc instead of directly monitoring the output voltage. if v cc exceeds 19v, an ovp circuit is activated, resulting in the termination of the switching operation. to avoid undesired activation of ovp during normal operation, v cc should be designed below 19v. 4.4.2 sync over-voltage protection (ovp) of fsq0565rq: if the secondary-side feedback circuit malfunctions or a solder defect causes an opening in the feedback path, the current through the opto-coupler transistor becomes almost zero. v fb climbs up in a similar manner to the overload situation, forcing the preset maximum current to be supplied to the smps until the overload protection triggers. because more energy than required is provid ed to the output, the output voltage may exceed the rated voltage before the overload protection triggers, resulting in the breakdown of the devices in the secondary side. to prevent this situation, an ovp circuit is employed. in general, the peak voltage of the sync signal is proportional to the output voltage and the fsq-series uses a sync signal instead of directly monitoring the output voltage. if the sync signal exceeds 8v, an ovp is triggered, shutting down the smps. to avoid u ndesired triggering of ovp during normal operation, two points are considered, as depicted in figure 33. the peak voltage of the sync signal should be designed below 6v and the spike of the sync pin must be as low as possible to avoid getting longer than t ovp by decreasing the leakage inductance shown at v cc winding coil. figure 33. ovp triggering of fsq0565rq 4.5 thermal shutdown with hysteresis (tsd): the sensefet and the control ic are built in one package. this enables the control ic to detect the abnormally high temperature of the sensef et. if the temperature exceeds approximately 140c, the thermal shutdown triggers ic shutdown. the ic resumes operation when the junction temperature decreases 60c from tsd temperature and v cc reaches startup voltage (v start ). 5. soft-start: the fps has an internal soft-start circuit that increases pwm comparator inverting input voltage with the sensefet current slowly after it starts. the typical soft-start time is 17.5ms. the pulse width to the power switching device is progressively increased to establish the correct working conditions for transformers, inductors, and capacitors. the voltage on the output capacitors is progressively in creased with the intention of smoothly establishing the required output voltage. this mode helps prevent transformer saturation and reduces stress on the secondary diode during startup. 6. burst operation: to minimize power dissipation in standby mode, the fps enters burst-mode operation. as the load decreases, the feedback voltage decreases. as shown in figure 34, the de vice automatically enters burst-mode when the feedback voltage drops below v burl (350mv). at this point, switching stops and the output voltages start to drop at a rate dependent on standby current load. this causes the feedback voltage to rise. once it passes v burh (550mv), switching resumes. the feedback voltage then falls and the process repeats. burst-mode operation alternately enables and disables switching of the power sensefet, thereby reducing switching loss in standby mode. figure 34. waveforms of burst operation v vcc_coil & v cc v sync v ovp (8v) v cc v vcc_coil v clamp v sh2 (4.8v) v dc n pri n vcc absolue max v cc (20v) t ovp t ovp improper ovp triggering fsq0565rq rev.00 v fb v ds 0.35v 0.55v i ds v o vo set time switching disabled t1 t2 t3 switching disabled t4 fsq0565 rev. 00
fsq0565rs/rq ? green- mode farichild power switch (f ps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565rs/rq rev. 1.0.2 16 7. switching frequency limit: to minimize switching loss and electromagnetic interference (emi), the mosfet turns on when the drain voltage reaches its minimum value in quasi-resonant operation. however, this causes switching frequency to increases at light load conditions. as the load decreases or input voltage increases, the peak drain current diminishes and the switching frequency increases. this results in severe switching losses at light-load condition, as well as intermittent switching and audible noise. these problems create limitations for the quasi-resonant converter topology in a wide range of applications. figure 35. qrc operation with limited frequency to overcome these problems, fsq-series employs a frequency-limit function, as shown in figures 35 and 36. once the sensefet is turned on, the next turn-on is prohibited during the blanking time (t b ). after the blanking time, the controller finds the valley within the detection time window (t w ) and turns on the mosfet, as shown in figures 35 and figure 36 (cases a, b, and c). if no valley is found during t w , the internal sensefet is forced to turn on at the end of t w (case d). therefore, the devices have a minimum switching frequency of 48khz and a maximum switching frequency of 67khz. 8. avs (alternating valley switching): due to the quasi-resonant operation with limited frequency, the switching frequency varies depending on input voltage, load transition, and so on. at high input voltage, the switching on time is relatively small compared to low input voltage. the input voltage variance is small and the switching frequency modulation width becomes small. to improve the emi performance, avs is enabled when input voltage is high and the switching on time is small. internally, quasi-resonant operation is divided into two categories; one is first-vall ey switching and the other is second-valley switching after blanking time. in avs, two successive occurrences of fi rst-valley switching and the other two successive occurrences of second-valley switching is alternatively se lected to maximize frequency modulation. as depicted in figure 36, the switching frequency hops when the input voltage is high. the internal timing diagram of avs is described in figure 37. figure 36. switching frequency range t s max =21 s t s max =21 s t b =15 s t s t b =15 s t s t s i ds i ds i ds i ds i ds i ds i ds i ds a b c d t w =6 s t b =15 s t b =15 s fsq0565 rev. 00 v ds v ds v ds v ds 53khz 67khz 59khz constant frequency v in assume the resonant period is 2 us f s s 21 1 s 15 1 s 17 1 avs trigger point 48khz s 19 1 avs region ccm dcm variable frequency within limited range db ca fsq0565 rev.00
fsq0565rs/rq ? green- mode farichild power switch (f ps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565rs/rq rev. 1.0.2 17 figure 37. alternating valley switching (avs) pcb layout guide due to the combined scheme, fps shows better noise immunity than conventional pwm controller and mosfet discrete solutions. furthermore, internal drain current sense eliminates noi se generation caused by a sensing resistor. there are some recommendations for pcb layout to enhance noise immunity and suppress the noise inevitable in power-handling components. there are typically two grounds in the conventional smps: power ground and signal ground. the power ground is the ground for pr imary input voltage and power, while the signal ground is ground for pwm controller. in fps, those two grounds share the same pin, gnd. normally the separate grounds do not share the same trace and meet only at one point, the gnd pin. more, wider patterns for both grounds are good for large currents by decreasing resistance. capacitors at the v cc and fb pins should be as close as possible to the corresponding pins to avoid noise from the switching device. some times mylar? or ceramic capacitors with electrolytic for v cc is better for smooth operation. the ground of these capacitors needs to connect to the signal ground (not power ground). the cathode of the snubber diode should be close to the drain pin to minimize stray inductance. the y-capacitor between primary and secondary should be directly connected to the power ground of dc link to maximize surge immunity. because the voltage range of feedback and sync line is small, it is affected by the noise of the drain pin. those traces should not draw across or close to the drain line. when the heat sink is connecte d to the ground, it should be connected to the power ground. if possible, avoid using jumper wires for power ground and drain. figure 38. recommended pcb layout mylar? is a registered trademark of dupont teijin films. 1st or 2nd is dependent on gatex 2 2nd valley switching 1st valley switching v gate gatex2 gatex2 : counting v gate every 2 pulses independent on other signals . one-shot avs fixed triggering fixed fixed de-triggering t b t b v ds t b v gate continued 2 pulses v gate continued another 2 pulses 1st valley switching t b t b 1st valley- 2nd valley frequency modulation. modulation frequency is approximately 17khz. v gate continued 2 pulses 1st or 2nd is depend on gatex2 synchronize synchronize fsq0565 rev. 00 t b triggering fixed fixed fixed
fsq0565rs/rq ? green- mode farichild power switch (f ps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565rs/rq rev. 1.0.2 18 typical application circuit features ! average efficiency of 25%, 50%, 75%, and 100% load conditions is higher than 80% at universal input ! low standby mode power consumption (<1w at 230v ac input and 0.5w load) ! reduce emi noise through valley switching operation ! enhanced system reliability through various protection functions ! internal soft-start (17.5ms) key design notes ! the delay time for overload protection is designed to be ab out 23ms with c105 of 33nf. if faster/slower triggering of olp is required, c105 can be changed to a smaller/larger value (e.g. 100nf for 70ms). ! the input voltage of v sync must be between 4.7v and 8v just after mosf et turn-off to guarantee hybrid control and to avoid ovp triggering during normal operation. ! the smd-type 100nf capacitor must be placed as close as possible to v cc pin to avoid malfunction by abrupt pulsating noises and to improve surge immunity. 1. schematic figure 39. demo circuit of fsq0565rs application fps? device input voltage range rated output power output voltage (maximum current) lcd monitor power supply fsq0565rs 85-265v ac 50w 5.0v (2.0a) 14v (2.8a) 3 4 c102 150nf 275vac lf101 30mh c101 150nf 275v ac rt1 5d-9 f1 fuse 250v 2a c103 100 f 400v r103 43k ? 1w c104 3.3nf 630v d101 1n 4007 c105 33nf 100v 1 2 3 4 5 t1 eer3016 bd101 2kbp06m 1 2 r101 12m ? 1w fsq0565rs v str vfb vcc drain gnd 1 2 3 4 6 8 10 d201 mbrf10h100 c201 1000 f 25v c202 1000 f 25v l201 5 h 14v, 2.8a 6 7 d202 mbrf1060 c203 2200 f 10v c204 1000 f 10v l202 5 h 5v, 2a r201 620 ? r202 1.2k ? r204 8k ? r203 18k ? c205 47nf r205 8k ? c301 4.7nf 1kv ic301 fod817a ic201 ka431 r102 68k ? c107 47 f 50v d102 uf 4004 r107 39k ? c106 100nf smd r108 27k ? sync 5 r105 100 ? 0.5w zd101 1n4745a optional components fsq0565rs rev.00
fsq0565rs/rq ? green-mode farichild power switch (fps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565rs/rq rev. 1.0.2 19 2. transformer figure 40. transformer schematic diagram of fsq0565rs 3. winding specification 4. electrical characteristics 5. core & bobbin ! core: eer3016 (ae=109.7mm 2 ) ! bobbin: eer3016 position no pin (s f) wire turns winding method top insulation: polyester tape t = 0.025mm, 4 layers n p /2 2 1 0.4 1 10 center solenoid winding insulation: polyester tape t = 0.025mm, 2 layers n a 4 5 0.15 1 7 center solenoid winding insulation: polyester tape t = 0.025mm, 2 layers n 5v 7 6 0.4 3(tiw) 3 solenoid winding insulation: polyester tape t = 0.025mm, 2 layers n 5v 8 6 0.4 3(tiw) 3 solenoid winding insulation: polyester tape t = 0.025mm, 2 layers n 14v /2 10 8 0.4 3(tiw) 5 solenoid winding insulation: polyester tape t = 0.025mm, 2 layers bottom n p /2 3 2 0.4 1 32 two-layer solenoid winding pin specification remarks inductance 1 - 3 600h 10% 67khz, 1v leakage 1 - 3 15h maximum short all other pins eer3016 n 14v n a 1 2 3 4 5 6 7 8 9 10 n p /2 n 5v n p /2 fsq0565rs rev.0.0 2 bottom top 3 10 8 n p /2 2 n 14v n 5v n p /2 1 6 n a 4 5 8 7 n 5v 6 fsq0565rs rev.0.0
fsq0565rs/rq ? green-mode farichild power switch (fps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565rs/rq rev. 1.0.2 20 6. demo board part list part value note part value note resistor c205 47nf/50v film (sehwa) r101 1m 1w c301 4.7nf/1kv y-cap(samwha) r102 75k 1/2w inductor r103 43k 1w l201 5h 5a rating r104 0 jumper l202 5h 5a rating r105 100 optional , 1/4w diode r107 39k 1/4w, 1% d101 in4007 vishay r108 27k 1/4w, 1% d102 uf4004 vishay r201 620 1/4w zd101 1n4745a 1w 16v zener diode (optional) r202 1.2k 1/4w d201 mbrf10h100 10a,100v schottky rectifier r203 18k 1/4w, 1% d202 mbrf1060 10a, 60v schottky rectifier r204 8k 1/4w, 1% ic r205 8k 1/4w, 1% ic101 fsq0565rs fps? capacitor ic201 ka431 (tl431) voltage reference c101 150nf/275v ac box capacitor(pilkor) ic202 fod817a opto-coupler c102 150nf/275v ac box capacitor(pilkor) fuse c103 100f/400v electrolytic (samwha) fuse 2a/250v c104 3.3nf/630v film (sehwa) ntc c105 33nf/50v film (sehwa) rt101 5d-9 c106 100nf/50v mono (pilkor) bridge diode c107 47f/50v electrolytic (samyoung) bd101 2kbp06m bridge diode c201 1000f/25v low-esr electrolytic capacitor(samwha) line filter c202 1000f/25v low-esr electrolytic capacitor(samwha) lf101 30mh c203 2200f/10v low-esr electrolytic capacitor(samwha) transformer c204 1000f/10v low-esr electrolytic capacitor(samwha) t1 eer3016 ae=109.7mm 2
fsq0565rs/rq ? green- mode farichild power switch (f ps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565rs/rq rev. 1.0.2 21 package dimensions to-220f-6l (forming) figure 41. 6-lead, to-220 package package drawings are provided as a servic e to customers considering fairchild components. drawings may change in any manner wit hout notice. please note the revision and/or date on the drawing and contact a fairchild semiconductor representative to verify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packag ing area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ .
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green- mode farichild power switch (f ps?) for quasi-resonant operation ? 2008 fairchild semiconductor corporation www.fairchildsemi.com fsq0565rs/rq rev. 1.0.2 22

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